「circuit analysis」の検索結果

Expert-level circuit analysis covering KVL, KCL, nodal and mesh analysis, Thevenin and Norton theorems, AC circuits, phasors, and frequency response.

日本語の概要は準備中です。原文の説明を表示しています。

Run automatic SPICE simulations on subcircuits detected from KiCad schematic analysis — validates filter frequencies, divider ratios, opamp gains, LC resonance, and crystal load capacitance. Supports ngspice, LTspice, and Xyce (auto-detected). Generates testbenches, runs batch mode, produces structured pass/warn/fail report. Use when the user asks to simulate, verify, or validate any analog subcircuit — RC filters, LC filters, voltage dividers, opamp circuits, crystal oscillators. Also for "simulate my circuit", "run spice", "verify with simulation", "check my filter cutoff", "does this divider give the right voltage", "what's the bandwidth of this opamp stage". Consider suggesting simulation during design reviews when the schematic analyzer reports simulatable subcircuits and a SPICE simulator is available.

日本語の概要は準備中です。原文の説明を表示しています。

Run automatic SPICE simulations on subcircuits detected from KiCad schematic analysis — validates filter frequencies, divider ratios, opamp gains, LC resonance, and crystal load capacitance. Supports ngspice, LTspice, and Xyce (auto-detected). Generates testbenches, runs batch mode, produces structured pass/warn/fail report. Use when the user asks to simulate, verify, or validate any analog subcircuit — RC filters, LC filters, voltage dividers, opamp circuits, crystal oscillators. Also for "simulate my circuit", "run spice", "verify with simulation", "check my filter cutoff", "does this divider give the right voltage", "what's the bandwidth of this opamp stage". Consider suggesting simulation during design reviews when the schematic analyzer reports simulatable subcircuits and a SPICE simulator is available.

日本語の概要は準備中です。原文の説明を表示しています。

Systematic analysis of DC and AC linear circuits using Ohm's law, Kirchhoff's laws, node and mesh methods, Thevenin and Norton equivalents, phasor analysis, and Bode plots. Covers series and parallel reduction, superposition, source transformation, impedance in the frequency domain, first and second order transient response, and the conversion between time domain and phasor representations. Use when quantitatively predicting voltages, currents, power, gain, phase, or time response of any lumped-element linear circuit.

日本語の概要は準備中です。原文の説明を表示しています。

Circuit simulation and pre-fabrication validation. Trigger on: "simulate", "run simulation", "spice", "check stability", "ripple analysis", "phase margin", "power supply simulation", "AC analysis", "transient analysis". Includes automated SPICE simulation via ngspice, RF chain analysis (scikit-rf), power/clock analysis (PyLTSpice), and PCB EM (openEMS FDTD). Run before ordering to validate performance before spending on prototypes.

日本語の概要は準備中です。原文の説明を表示しています。

Build sequential (stateful) logic circuits including latches, flip-flops, registers, counters, and finite state machines. Covers SR latch, D and JK flip-flops, binary/BCD/ring counters, and Mealy/Moore FSM design with clock signal and timing analysis. Use when a circuit must remember past inputs, count events, or implement a state-dependent control sequence.

日本語の概要は準備中です。原文の説明を表示しています。

RF Toolbox and RF Blockset in MATLAB -- S-parameter I/O, network conversions (S/Z/Y/ABCD/T/H/G, mixed-mode), cascade/de-embedding, rfbudget analysis, circuit composition, matching networks, amplifier stability, mixer spurs, rational fitting, SI channels, baseband processing, Circuit Envelope simulation. Trigger: sparameters, Touchstone, .s2p, .s4p, rfplot, smithplot, rfparam, rfwrite, zparameters, yparameters, abcdparameters, s2sdd, cascadesparams, deembedsparams, rfbudget, noise figure, OIP3, IIP3, amplifier, modulator, nport, rffilter, attenuator, seriesRLC, shuntRLC, lcladder, txline, circuit, setports, clone, matchingnetwork, stabilityk, stabilitymu, powergain, gammams, gammaml, mixerIMT, OpenIF, rational, rationalfit, stepresp, txlineWRLGC, rf.Amplifier, rf.Mixer, rf.Filter, rf.Sparameter, rfsystem, RF Blockset.

日本語の概要は準備中です。原文の説明を表示しています。

Cascade PCB components, add lumped elements, export Touchstone, and bridge to eye diagram or antenna array workflows. TRIGGER: user asks to cascade or connect multiple RF PCB components, add lumped R/L/C, export S-parameters to Touchstone, or combine PCB elements into a circuit. Invoke BEFORE writing pcbcascade or circuit code — cascade rules and port matching are non-obvious. SKIP: designing individual components (use the specific matlab-design-pcb-* skill), EM analysis of a single component (use matlab-analyze-em), material/stackup setup only (use matlab-manage-pcb-material), optimization (use matlab-optimize-pcb-design).

日本語の概要は準備中です。原文の説明を表示しています。

Electrical and electronic engineering reference — circuit analysis, component selection, power supply design, signal integrity, RF, thermal, EMC, and test & measurement. Use for design questions, calculations, component vetting, and first-principles analysis. Do not orchestrate a complete new board from requirements; use circuit-weaver for that end-to-end workflow.

日本語の概要は準備中です。原文の説明を表示しています。

Circuit simulation workflows — SPICE simulation via ngspice, confidence scoring, RF chain analysis (scikit-rf), power/clock transient and AC analysis. Trigger on: "simulate", "run simulation", "spice", "check stability", "ripple analysis". Load the canonical sim skill from `project-skills/sim/SKILL.md`.

日本語の概要は準備中です。原文の説明を表示しています。

Knowledge base from the FAA System Safety Handbook (Dec 30, 2000). Use for system safety as a specialty within systems engineering: the five-step safety risk management process (mandated by FAA Order 8040.4 and the AMS), the severity-by-likelihood risk matrix and acceptance bands, the Safety Order of Precedence, system-description models (5M, SHEL(L)), the hazard-analysis activities (PHL/PHA/RHA/SSHA/SHA/O&SHA/HHA), integrated system hazard analysis, the analysis techniques (FTA, FMEA/FMECA, Fault Hazard, Common Cause, Sneak Circuit, Energy Trace), closed-loop hazard tracking (Safety Action Record), and the specialty domains the handbook covers — acquisition-lifecycle safety and contracting (OSA/CSA/SSPP/ISSPP), software safety (control-capability ranking, SHCM, DO-178B), test & evaluation safety, facilities safety, commercial launch safety (AST licensing, expected casualty, MPL/DAMP), system safety training, and Operational Risk Management (ORM) with human/organizational factors. Scope limits: this is a year-2000 FAA how-to; it predates the modern FAA/ICAO Safety Management System (SMS) and Just Culture regulatory frameworks, and many cited orders, advisory circulars, and launch-licensing rules have since been restructured. It is FAA/NAS-centric, leans on MIL-STD-882C, and does not define the SE life-cycle processes themselves (use nasa-npr-7123 / dau-se-guidebook) or reproduce third-party standard text (MIL-STD-882, DO-178B, ISO/IEC/IEEE).

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Analyze KiCad projects and PDF schematics: schematics, PCB layouts, Gerbers, footprints, symbols, netlists, and design rules. Reviews designs for bugs, traces nets, cross-references schematic to PCB, extracts BOM data, checks DRC/ERC, DFM, power trees, and regulator circuits. Every finding carries a confidence label and evidence source with trust_summary rollup. Analyzes PDF schematics from dev boards, reference designs, eval kits, and datasheets. Supports KiCad 5–10. Use whenever the user mentions .kicad_sch, .kicad_pcb, .kicad_pro, PCB design review, schematic analysis, PDF schematics, reference designs, Gerber files, DRC/ERC, netlist issues, BOM extraction, signal tracing, power budget, DFM, or wants to understand, debug, compare, or review any hardware design. Also for "check my board", "review before fab", "what's wrong with my schematic", "is this ready to order", "check my power supply", "verify this circuit", OSHWA certification readiness, or any electronics/PCB design question.

日本語の概要は準備中です。原文の説明を表示しています。

Analyze KiCad projects and PDF schematics: schematics, PCB layouts, Gerbers, footprints, symbols, netlists, and design rules. Reviews designs for bugs, traces nets, cross-references schematic to PCB, extracts BOM data, checks DRC/ERC, DFM, power trees, and regulator circuits. Every finding carries a confidence label and evidence source with trust_summary rollup. Analyzes PDF schematics from dev boards, reference designs, eval kits, and datasheets. Supports KiCad 5–10. Use whenever the user mentions .kicad_sch, .kicad_pcb, .kicad_pro, PCB design review, schematic analysis, PDF schematics, reference designs, Gerber files, DRC/ERC, netlist issues, BOM extraction, signal tracing, power budget, DFM, or wants to understand, debug, compare, or review any hardware design. Also for "check my board", "review before fab", "what's wrong with my schematic", "is this ready to order", "check my power supply", "verify this circuit", OSHWA certification readiness, or any electronics/PCB design question.

日本語の概要は準備中です。原文の説明を表示しています。

Design and analysis of combinational and sequential digital circuits using Boolean algebra, truth tables, K-maps, CMOS gate implementation, flip-flops, registers, counters, and finite state machines. Covers De Morgan's theorems, canonical sum-of-products and product-of-sums forms, minimization techniques, propagation delay, setup and hold times, metastability, synchronous design discipline, and FSM encoding. Use when designing, minimizing, verifying, or debugging any circuit whose signals take only discrete logic values.

日本語の概要は準備中です。原文の説明を表示しています。

Knowledge base from MIL-HDBK-338B (Electronic Reliability Design Handbook). Use for electronic reliability engineering: R/M/A theory, reliability specification/allocation/prediction, parts management and derating, reliable circuit and fault-tolerant design, environmental and human performance reliability, FMEA/FMECA/FTA/sneak circuit analysis, design reviews and testability, FRACAS, reliability demonstration and growth testing, and systems-level R&M parameters. Covers selected Part 2 design-guidance topics only; skips large annex/part-stress tables. Guidance handbook — not a contractual requirement text. Does not replace MIL-HDBK-217 prediction libraries, service-specific reliability regs, or safety standards (see mil-std-882).

日本語の概要は準備中です。原文の説明を表示しています。

Provides guidance for mechanistic interpretability research using TransformerLens to inspect and manipulate transformer internals via HookPoints and activation caching. Use when reverse-engineering model algorithms, studying attention patterns, or performing activation patching experiments.

日本語の概要は準備中です。原文の説明を表示しています。

Provides guidance for mechanistic interpretability research using TransformerLens to inspect and manipulate transformer internals via HookPoints and activation caching. Use when reverse-engineering model algorithms, studying attention patterns, or performing activation patching experiments.

日本語の概要は準備中です。原文の説明を表示しています。

Provides guidance for mechanistic interpretability research using TransformerLens to inspect and manipulate transformer internals via HookPoints and activation caching. Use when reverse-engineering model algorithms, studying attention patterns, or performing activation patching experiments.

日本語の概要は準備中です。原文の説明を表示しています。

Bench instruments and measurement techniques for electronics — digital multimeter, oscilloscope, logic analyzer, spectrum analyzer, function generator, power supply, and their proper use. Covers probing technique, ground loops, loading effects, trigger modes, FFT mode pitfalls, signal integrity, noise budget analysis, and debugging workflows from "it doesn't work" to "here is the failure mechanism." Use when measuring, debugging, or characterizing any electronic circuit or firmware-hardware interaction.

日本語の概要は準備中です。原文の説明を表示しています。

Latest news articles, regulatory filings, community discussion topics for listed stocks, and SEC EDGAR filing analysis (10-K/10-Q/8-K/proxy/Form 4) via Longbridge. Triggers: "新闻", "公告", "资讯", "话题", "社区讨论", "SEC", "10-K", "10-Q", "8-K", "Form 4", "新聞", "公告", "資訊", "話題", "社區討論", "news", "filing", "announcement", "topic", "community", "SEC filing", "annual report", "quarterly report", "proxy", "insider filing", "regulatory rules", "监管规则", "涨跌停", "漲跌停", "T+1", "PDT rule", "熔断", "熔斷", "circuit breaker", "margin rules", "保证金", "保證金", "監管規則"

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Prospective failure analysis using Gary Klein's pre-mortem technique. Assumes complete failure, works backward to identify risks, leading indicators, and circuit breakers. Counters optimism bias by forcing systematic exploration of failure modes before they materialize. Use for project plans, architecture decisions, technology adoption, business strategy, or feature launches. Triggers on "리스크", "위험", "실패하면", "swing-mortem", "뭐가 잘못될 수 있어", "risk", "what could go wrong", "걱정되는 점", "failure modes", "리스크 분석", "위험 분석".

日本語の概要は準備中です。原文の説明を表示しています。

KiCad schematic, PCB, Gerber, and PDF schematic analysis. Load the canonical Circuit Weaver skill from `skills/kicad/SKILL.md`.

日本語の概要は準備中です。原文の説明を表示しています。

Use when a task needs the judgment of a Crushing/Grinding Machine Operator — recognizing that classifier cut point, not mill residence time alone, determines what reports to finished product in a closed-circuit grinding operation, monitoring circulating load as a distinct diagnostic variable, matching grinding media size to the target size reduction, or verifying product size via actual sieve/laser analysis rather than mill parameters.

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Use when introducing a feature flag system, choosing between release flags / experiment flags / operational flags / kill switches / permission flags, designing percentage rollouts, building kill-switch + circuit-breaker patterns, structuring evaluation contexts (user IDs, plan tier, region), or building flag-cleanup discipline. Triggers: LaunchDarkly / GrowthBook / Unleash / Flagsmith / OpenFeature, percentage ramp, sticky bucketing, kill switch wired to alerting, "we still have flags from 2 years ago", flag debt, OpenFeature provider, evaluation context, default value on provider failure. NOT for A/B test statistical analysis (separate skill), traffic-split routing at the edge, build-time bundler defines, or environment-based config.

日本語の概要は準備中です。原文の説明を表示しています。